Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Questions about s-parameter simulation of LNA.

Status
Not open for further replies.

htforever

Member level 4
Joined
Jul 1, 2003
Messages
75
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
China
Activity points
749
5988-2336en

A LNA consist of a low noise transistor, input matching network, output matching network and bias network.

So, when make small signal s-parameter simulation of LNA, Is't necessary to consider the bias network?
And how to distinguish matching network and bias network? As sometimes the matching component
is placed in the bias network, for example the ATF-54143 reference design provided by Agilent.

Thank you very much.
 

There are two ways to simulate the amplifier.

One is a simple approximation that simplifies the circuit to just the active device and the source and load presented to it by the networks. This can be done by hand or on a low cost software such as adlab.

The other is to include the phsyical nature of the entire circuit (conductor lengths, widths, and height above the ground plane) along with the S parameters. Expensive simulators such as Microwave Office can do this.
 

Hi, flatulent:
I use ADS to make the simulation.
So I want to simulation everything that has accuracy model and has influence on the result.
I want to have my design divinable.

But I can't distinguish matching network from bias network.
 

You should include the entire circuit to get accurate results. Do not try to simplify things by making assumptions that the bias network has been chosen to not influence the circuit performance.
 

As you said, sometimes it is intentional to merge bias/match network and this is obvious.
The bias network, if not well designd can impact on signal, so on s parameter of the LNA.
Also the layout is fundamental, of course.
But I do not really understand your problem: could you be more detailed?
Furthermore, do not expect perfect matching between simulations and measurements. Always and especially in RF the goal is reached witha "cut and try" procedure, also if you're supported by the high end simulators.
Bye
Mazz
 

L1,C1,C2: input match
R4: stability at low frequencies
C3: low frequency decoupling cap
R1,R2,R3,R5: bias
C4,L4,C5: output match
C6: decoupling cap
 

Hi, Mazz:
I can understand your point of view.
But some other people have different opinions. They think if you use accurate model of all components, take everything into consideration,
the schematic circuit is the same as the PCB Layout, the measurement result is divinable, it's basically identical with the simulation result.
To Traditional RF Design Process, I prefer to Modern, Predictive RF Design Process.
 

The problem is that my simulation result is always quite different from the measurement result.
This makes me very gloomy.
 

Hi, radiohead:
This is ATF-54143 reference design. Have you ever used this circuit to design LNA with ATF-54143?

I have doubt about this circuit:
Please check these two Application notes:
High Intercept Low Noise Amplifier for the 1850 – Please check these two 1910 MHz PCS Band using the Agilent ATF-54143 (5988-2336EN)
High Intercept Low Noise Amplifier for 1.9 GHz PCS and 2.1 GHz WCDMA Applications using the ATF-55143 (5988-3399EN)
In these two Application notes, Agilent gives the same layout and the nearly the same input matching network, the same inductor L1 and the same cap C2, the only different is the C1, which is 8.2Pf for 54143 and 5.6pf for 55143.
But ATF-54143 at bias of Vds=3V, Id=60mA have very different S11 and Sopt from ATF-55143 at the bias of Vds=2.7V, Id=10mA.



I have tried to simulate Agilent’s ATF-54143 reference circuit with ADS, the result is really bad. And you can check the bias resistor R3, the R3 should be 33Ohm not 10 Ohm when Vdd=5V and bias of 3V@60mA.

Has anyone tried agilent’s reference design? Does it work well?

And in a small signal S-parameter simulation, R4 and C3 should also be included in the schematic? And how about the microstrip lines between L1, R4, C3? should them be included in the schematic too?
R4: stability at low frequencies
C3: low frequency decoupling cap
 

1. Do not forget the series inductances with the source terminal. Although small, they might have great influence
2.Think: R3 is only for BIASING. It is decoupled by C5. This should have no influence at all at RF. Although it might introduce a little loss if you use S-parameter models for your lumped elements. Nothing is ideal!
3.Why omit the biasing networks for RF simulation? The times we had to calculate it through by hand are long behind us. Use you computer!
4. Of course you have to include the series TL in front and at the back
5. In your case, I would rather trust on the expertise of Agilent than try to design my own LNA. First learn what basic RF design is all about. And then advance to more challenging designs.
 

htforever said:
A LNA consist of a low noise transistor, input matching network, output matching network and bias network.

So, when make small signal s-parameter simulation of LNA, Is't necessary to consider the bias network?
And how to distinguish matching network and bias network? As sometimes the matching component
is placed in the bias network, for example the ATF-54143 reference design provided by @gilent.

Thank you very much.

Hi htforever

Yeah it's very important to consider the bias netwroks in a LNA design unless they are well isolated from RF Signals in the band of interest.
In some cases the bias network is a part of the matching circuitry and in that case it should be ensured that the RF signal(band) is provide a short before the bias is applied. hope you got it.

bye
 

Hey! I have faced a problem during biasing of ATF5143...
i.e. if I want 3V,60mA biasing condition, I take 33 ohms of res at drain. But for 2 mA of Igs, I am getting 0.1V of Vgs which should be 0.59V typical as datasheet suggests.

My biasing has gone wrong there.:-(
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top