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  1. #1
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    How to Read a file into verilog test bench and pass it to the verilog code

    Hi,

    I need to generate a signal from MATLAB and store the data into a file and then use that file as an input to verilog code.

    i just need to know how to read a file in verilog. and in what format should the file be to be able to be read in verilog.

    can someone please help me with that.

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  2. #2
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    Re: How to Read a file into verilog test bench and pass it to the verilog code

    $readmemh() is very usful for such tasks.
    Need to define an array, the file should hold hex values (in text, not a binary file), readmemh loads the values into the array.
    google readmemh and you'll find a few examples.



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