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Post Layout Simulation whit L-edit.

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Oveis.Gharan

Oveis.Gharan

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Hi everybody

I have a problem in post layout simulation.
I extract a system from layout in L-edit to spice netlist. Finally in the extract result, i could not find the inputs and outputs nets of my system. Through a lot of nets , it is not clear which nets are in/out ones which pads are.

Could you guide me?

Thanks in advance.
Alireza
 

By extracted result, do you mean your netlist? The parasitic extracted netlist?
You can easily find the ports in the netlist. Think of it as any spice netlist. The subckt is defined at the top or bottom, and all the ports are labelled in that definition.

If the hierarachy of your layout and schematic do not match, then you might have done a flat layout extraction, in which case, the net names get confusing. But in any case, the i/o ports have the same names as those in the schematic, and you should be able to see them in the subckt definition.
 
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