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4 bit shift left, shift register problem.

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technowar

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Hi, I really need help with my shift register. I am using 74LS95, and I can't use shift left properly. I used Proteus to simulate my shift register.

This is my shift left:
0001 - First pulse
0011 - Second pulse
0111 - Third pulse
1111 - Fourth pulse

But what I want is like this,
0001 - First pulse
0010 - Second pulse
0100 - Third pulse
1000 - Fourth pulse

I am using Parallel-to-Serial shift register. I hope you could help me. Thanks.
 
Last edited:

What do you have the Ds pin connection to?
 

D0 to Q1, D1 to Q2, D3 to Q3. It does 0001 -> 0011 -> 0111 -> 1111. But what I want is 0001 -> 0010 -> 0100 -> 1000
 

technowar said:
D0 to Q1, D1 to Q2, D3 to Q3. It does 0001 -> 0011 -> 0111 -> 1111. But what I want is 0001 -> 0010 -> 0100 -> 1000
Click to expand...
... is wrong. D2 to Q3 of course. If you want a ring-shift: additionally D3 to Q0. You must initialize D3 (in case of shift left) by a log. "1" only for the first clock pulse: Connect Q0 via a 1kΩ resistor to D3, and D3 via a capacitor to VDD (1nF..1µF, depending on your clock frequency). S=HIGH for left-shift.
 

Oh yeah, my bad. It was D2 to Q3. Anyways, thanks for the replies. I have solved my problem.
 

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