Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

matching of two different capacitors

Status
Not open for further replies.

angyp

Newbie level 5
Joined
May 18, 2004
Messages
10
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
130
good matching for two capacitors can be achieved if their ratios of perimeter to area are designed to be the same, even when they are of different sizes.
does anyone knows the formula to get the x and y perimeter for two matched capacitors of different size?
 

To match different size capacitors create these capacitors with the same unit capacitor.

All unit capacitors (the main unit capacitors and unit dummy capacitors with the same size) create rectangle.

Choose the shape of this rectangle depend on your layout.
 

using a constant sized blocks and copy paste of the is a must to achive the most accurate ratios; also the matching parameters is depending on the technology u are using, they can be found in documention of your process.

BEST!
 

One further trick is to alternate the two sets of unit capacitor cells. This will minimize the gradient of oxide thickness across the wafer. You can do this in two dimensions like the red and black squares on a chess board.

This was the standard way to minimize offset voltage on the input stage of bipolar op amps by making the two differential transistors from smaller ones in parallel and intermixed.
 

Add guard ring for these caps to reduce the effect by arround circuits.
 

Don't forget to add dummy caps alla around the real ones so that the environment (i.e., surrounding) is the same for all the real ones. This trick will minimize the impact of litho non-uniformity on the capacitors.

nathan
 

the matching is affected from the thickness of oxide(nitride) , etching speed of x and y axis and circumstances of cell.
i donot know the formula but the most precise etching i.e. design rule times 10 for a side is enough from my test etching result
 

Do we need put gardring for MIM cap in the layout? and why?

Thanks
 

Usually,MiM cap is used as decoupling cap,so no guardring is necessary.
 

Hi,

If u use poly-substrate caps (mos transistors) do not forget to put as many and as simetricaly ubstrate contacts as possible, between and around them.

Regards
 

It is the best to always use unit-sized capacitors to realized the required ratio. But if it is not possible, try to make the capacitor's perimeter-to-area ratio the same with unit capacitor. I remember K.Martin's book has a good example of the trick.
 

other is place them on axes of symmetry of the die
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top