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How to reduce noise in a circuit

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visionbjp

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I am currently designing current mode lna
problem is noise is too high~!...10dB??

I am using cadance
and checked noise parameters
and found out that

Port rn 25%
MN1(nmos) id 24%
MP1(pmos) id 15%

first what is ports rn parameter and mos's id
and How do we reduse those parametes/////
 

I am no noise expert but I believe that Port rn 25% means that 25% of the noise in your circuit is produced by the resistance of your power source (which I assume is 50 Ohms). As far as the noise from each transistor, you can change their biasing to increase the transconductance (gm) of each device and that will reduce their noise contribution.
 

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