Electronicmember
Newbie level 4
In general, to achieve good PSRR of a circuit, the circuit should be better shielded from the power supply, in other words, this circuit should better have a stable performance despite of the changing power supply voltages
But for a LDO, to get a good PSRR. I think this means that, when the input voltage on the source of a PMOS power transistor is changing, the gate voltage(the output voltage of the error amplifier) should be able to follow the change of the source voltage to get a stable output at the drain of the power transistor
>>>so this means that the error amplifier should follow the power supply change. Otherwise if the power supply has ripples, but the gate of the power transistor is constant, very bad PSRR will be gotten.
Now I am a little confused about this post, to improve PSRR is to shield the error amplifier from the power supply or to make the power amplifier follow the power supply change?
Another question is, PSRR in which frequency range is interesting for us? On different data sheets and papers, different frequency ranges are given, sometimes several KHz, sometimes, several MHz?
But for a LDO, to get a good PSRR. I think this means that, when the input voltage on the source of a PMOS power transistor is changing, the gate voltage(the output voltage of the error amplifier) should be able to follow the change of the source voltage to get a stable output at the drain of the power transistor
>>>so this means that the error amplifier should follow the power supply change. Otherwise if the power supply has ripples, but the gate of the power transistor is constant, very bad PSRR will be gotten.
Now I am a little confused about this post, to improve PSRR is to shield the error amplifier from the power supply or to make the power amplifier follow the power supply change?
Another question is, PSRR in which frequency range is interesting for us? On different data sheets and papers, different frequency ranges are given, sometimes several KHz, sometimes, several MHz?