Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Are power planes as good as GND planes?

Status
Not open for further replies.

creepy

Junior Member level 2
Joined
Feb 22, 2004
Messages
21
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
200
Hi everyone

Are power planes as efficient as GND planes to prevent crosstalk between routing layers? They should be, if the power is connected with capacitors to the GND plane, right? What do you think?

Regards

Stefan
 

From AC point of view, power planes are identical with ground planes. Of course, some rules must be obeyed, depending on your design. Both planes are return paths for high speed signals routed on signal layers. The return path for high speed signals is the path with the lowest impedance, more precise the plane under the trace. In a 4 layer board, assuming that top and bottom are routing layers and middle 1 and 2 are power/gnd planes, when you jump with a trace from top to bottom, you will create a discontinuity in the return path. The return path for portion of trace routed on top layer is the plane under it, and the other plane for the bottom portion of trace. But the planes are not connected (from ac point of view) in the vicinity of the via used for jump. To compensate that discontinuity, place a decoupling capacitor in the immediate vicinity of via. More informations available at mcu server or in e-books up/dl section (keywords: signal integrity, high speed pcb).

/pisoiu
 

Hi,
Power planes (Vcc Planes) are as good as GND planes. However in some of my recent designs ( I work on L1 and L2 frequencies), I have found that it makes better sense to use a track for Vcc and Plane for ground. I use separate tracks for each Vcc PIN, so I can filter each one separately and follow normal Bypass capacitor placement rules.

Hope this helps,
BRMadhukar
 

pisoiu said:
From AC point of view, power planes are identical with ground planes. Of course, some rules must be obeyed, depending on your design. Both planes are return paths for high speed signals routed on signal layers. The return path for high speed signals is the path with the lowest impedance, more precise the plane under the trace. In a 4 layer board, assuming that top and bottom are routing layers and middle 1 and 2 are power/gnd planes, when you jump with a trace from top to bottom, you will create a discontinuity in the return path. The return path for portion of trace routed on top layer is the plane under it, and the other plane for the bottom portion of trace. But the planes are not connected (from ac point of view) in the vicinity of the via used for jump. To compensate that discontinuity, place a decoupling capacitor in the immediate vicinity of via. More informations available at mcu server or in e-books up/dl section (keywords: signal integrity, high speed pcb).

/pisoiu

I don't understand here "you will create a discontinuity in the return path"
Why the return path is discontinuity?

Thanks
 

The return path for a high speed signal trace is the lowest impedance path. In a 4 layer board, the return path for a trace routed on top layer is the first plane under the top layer. When you jump with that trace from top to bottom, for the portion of trace which is routed to bottom, the return path is not the same as for the portion routed on top. It is the other plane (3rd plane, if you consider top-first, bottom-last). So, the current will flow from source to destination using your trace routed from top to bottom, but it will travel back using both power planes. Power planes are connected somewhere with decoupling capacitors, which connects them from AC point of view, and the current in the return path will jump from one plane to other using the closest decoupling cap to the via used for trace jump. In order to make the return path as close as possible to the direct path, that capacitor must be placed as close as possible to via, between those power planes. Of course, this apply at high frequencies, when your signal have rise/fall times around few nanoseconds or less.

/pisoiu
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top