Help me write hamming code in Verilog

I want to write the verilog code of hamming code?

can anyone help me?

vhdl code for hamming code

Well, I've just spent about 4 weeks writing and simulating a Hamming encoder and decoder in ABEL and schematics. I'm not at all familiar with verilog, but I'm sure you can translate since ABEL is easy to understand.

What is it you want exactly? Do you know how hamming coders work?

And what are the constraints of the design, BER, data width, avaiable resources???

If you just want code, theres plenty on the web, found 10 examples in my first search.

Just a warning, with data wider than 8 bits, the parity (XOR) equations become quite big, especially in the decoder, since the number of operations is 2^(n-1). I tried a code with a parity check on 13 bits, thats 2048 p-terms 8O <-Not nice. Solution, don't work in parallel.

I'll try to help if I can.
Buried(in)Code.

hamming code in verilog

Buriedcode
for 8 bits parity, I use 2 sets of 16x1 LUT and XOR their out together (good for xilinx arch.), it may appliable to your design.