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  1. #1
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    questions about track and hold circuit in ADC

    hello, everyone
    I have following questions about track and hold circuit.

    (1)What's the difference between track and hold(T/H) and sample and hold

    (2)how to T/H improve ADC input bandwidth?
    by holding the input to a DC level while ADC is converting?

    (3)how to improve the speed of T/H, in other words, what's the difference between
    1GS/s and 3GS/s T/H?

    (4)in some papers, sampling rate of ADC is 2GS/s, but why 2GHz input bandwidth is required?

    (5)in some papers, for example, why the input bandwidth is 0.8GHz-1.5GHz, not 0-1.5GHz?

    thanks for your reply.

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  2. #2
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    Re: questions about track and hold circuit in ADC

    i have the same quetions....esp. (5)



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  3. #3
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    Re: questions about track and hold circuit in ADC

    (1) https://www.edaboard.com/thread157444.html
    (2) Yes, you are right in some sense, the bandwidth is not really increased, but you are simplifying for the comparator(s) in the quantizer.
    (3) That's quite tricky to answer just like that. I suppose you want to maintain accuracy but increase sample speed. If you have an active S/H, the corresponding active components would typically burn more power.
    (4) 2 GSPs vs 2 GHz is not really a required relationship. To claim a true Nyquist converter, you would require an input bandwidth higher than Nyquist. However, the ADC might as well be used for subsampling and then bandwidth needs to be much higher. It could also be that you want to avoid phase and amplitude distortion in the signal path and then you have to have higher bandwidth than the -3-dB bandwidth at Nyquist.
    (5) Not sure really... is there maybe a subsampling ADC? Input could be centered around 1 GHz and then sample at 1.2 GHz and data is then at 200 MHz. To accomplish this they might have sacrificed some "DC" accuracy, maybe they even have a DC block and restore DC inside. You probably have to give an example.



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