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    FPGA SPARTAN 3E and VHDL PROGRAMMING (NEED URGENT HELP)

    I am currently working on a thesis project entitled FPGA-based built-in-self-test for a 4 bit BCD adder, We are now testing for the stuck at faults.. I need someone who can teach me how to burn the program in the FPGA board and how to use or manipulate the clock of the board. Also, I need to save the dta in the memorry for comparison purposes. Please help anyone.


    Also if there's someone from the philippines please tell me so i can contact u or vise versa.. it would be greatly appreciated. thanks!

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  2. #2
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    FPGA SPARTAN 3E and VHDL PROGRAMMING (NEED URGENT HELP)

    I'm from Brazil, but I think I can help you. You can describe a frequency divider for the 50 Mhz oscilator on the board. To download a VHDL code in the FPGA, you can read the ISE Quick Start Tutorial that you can find here: http://www.xilinx.com/itp/xilinx10/b...cs/qst/qst.pdf

    ∫Good Luck.dx



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  3. #3
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    Re: FPGA SPARTAN 3E and VHDL PROGRAMMING (NEED URGENT HELP)

    You can use ISE iMPACT tool to download bit file to the board, iff you are using an ISE supported JTAG. Some board vendors have their own tools to download bit files. Usually the boards have oscillators which can be configured for different frequencies with a jumper. And you need to know which pin of the FPGA the clock is routed to.



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