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PDK testing or verification.

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sahaldar

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1. How do you go about testing a PDK ? is it manually (creating test case for each component bjt, res, inductor and running the simulation) or is there aumated tools available.
2. Does the component results checked againts the foundry data?
3. Do you also check or compare the PDK's developed in Cadence, Synopsys, Agilent ADS etc EDA tools?

Thanks and Regards
 

Below pls. find a feedback on this from a Cadence customer:
 

For good foundries I have seen for most components comparisons of measurements versus simulations. But this only belongs to the model like MOS PSP or Bipolar HiCUM which are supplied typical by many EDA vendors. Geometrical properties are similar to all EDA vendors if a foundry offers a Multi-EDA-DesignKit.

I had questions long time ago if the foundry models represent the process in terms of electrical accuracy to some frequency depend accuracy class, e.g. 5% up 1GHz, 10% up to 5GHz, 20% up top 20GHz, for all allowed component properties. That was I tought a simple accuracy aggreement. But no foundry could agree on this measure or want to follow this principle in future.

The problem is that most detailed knowledge are comming from circuit application. Pure play foundries are loosing specific process modelling knowledge over classic IDMs. The reference above are using there own DesignKit and Modelling and want to apply that in a generic fashion to any fab.

So the role has changed. Fabless are doing there own kits. Foundies supply only the very basics. But the business of supplying third party foundry independend high quality kits is not started yet
 

sahaldar said:
1. How do you go about testing a PDK ? is it manually (creating test case for each component bjt, res, inductor and running the simulation) or is there aumated tools available.
2. Does the component results checked againts the foundry data?
3. Do you also check or compare the PDK's developed in Cadence, Synopsys, Agilent ADS etc EDA tools?

This company provides services and software for verification of device models:

www.accelicon.com

Validation of parasitic extraction PDKs is a completely different story...
 

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