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How to increase the output impedance in a common drain buffer?

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Elektrix

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Hi,

I want to use a common drain MOSFET acting as a buffer.
This circuit has a very high input impedance and a low output impedance.

Attached you can see the circuit, and is working like it should be working.

But how can I make the output impedance to be 50Ohm?

Thanks
 

Re: Common drain buffer

If you neeed output resistance to be exactly 50Ω, I would recomend you to use an opamp voltage follover and attach a 50Ω resistor to it.

With your circuit, you have to know the output resistance before you can alter it by adding a resistor to it.

I'm sorry to say I can't calculate the current output resistance for you.
 

Re: Common drain buffer

As a first point, the gate of the current source transistor is connected incorrectly. You can possibly achieve 50 ohm output
impedance by selecting an appropriate MOSFET respectively adjusting the transistor size in IC design.

You didn't mention the intended frequency range, so it's not clear, if OP buffer is an option. But you can add FET or BJT transistor
to build a composite buffer with loop gain and lower output impedance. Impedance matching is possible with an series
resistor, as sugggested.
 

Re: Common drain buffer

Thank you.
I will try these suggestions.
 

Re: Common drain buffer

Hmm, I think I didn't quite understand how this buffer works.

When I read about it in electronics books, I see 2 (there are more, but usually I see these two) basic topologies.

1) MOSFET + resistance : Here we start with a bias current Ids. Now if that bias current Ids is flowing, we can calculate Vgs from equation Ids = K(Vgs -Vt)². If the current Ids would now be constant, Vgs would be constant too and the voltage at the source would just follow the voltage at the gate (minus the offset Vgs), hence the name source follower.

Problem: If the voltage at the gate changes, so would Ids, since there is no constant current source. This implies that gm changes and this produces non-linearities.

2) MOSFET + MOSFET : If we replace the resistor with a current source, in this case a MOSFET, we get a 'constant' current source and this implies Vgs, Gm, ... would be constant. This makes this source follower a better topology.

Is this correct?

If so, what is the importance if Ids? I mean what are the relevant factors when choosing a biasing current Ids?
 

Re: LTE BS issues

Hi,
ya I accept that BS can support both FDD & TDD mode ,
But my question is can they dynamically change the mode while operating based on need ???

Thanks
indian elango
 

Re: Common drain buffer

Elektrix said:
Is this correct?

Yes.

Elektrix said:
If so, what is the importance if Ids? I mean what are the relevant factors when choosing a biasing current Ids?

1) From the large signal standpoint Vo = Vi - Vth - sqrt(2*(Ids+Vo/RLoad)/k'/W/l). If Ids >> Vo(max)/RLoad, than (ignoring body effect) output voltage will linearly depend on input votlage.

In general case load is tied not to the negative power supply, but to the some potential Vl (typically value midway power supplies is considered). When Vo > Vl, load sinks current, when Vo < Vl, load sources current. For this case Vo = Vi - Vth - sqrt(2*(Ids+(Vo-Vl)/RLoad)/k'/W/l) and output voltage range will be limited by the value Vo(min) = -Ids*RLoad + Vl. Thus for a given load Ids will determine minimal value of the output voltage.

2) Output resistance of the follower with current source is approximately 1/gm = 1/sqrt(2*k'*W/l*Ids). Thus increasing Ids value decreases output resistance. But for large Ids values (typically more than several hundred uA) output impedance of the follower may appear inductive. This can lead to undesired (resonant) behavior of the circuit in the case of the capacitive load.
 

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