Noise Power of a 3rd Order digital modulator

[neoflash]

Hi,

I've done the correlation of the noise power of a 3rd order modulator. Its block diagram is shown below.

I've two results to be compared:

1. Using closed-form formula and do integration.
2. Using verilog-HDL model and post process data in matlab to obtain the noise power.

The results are respectively 0.47 and 0.5037.

I would like to learn that if this is a reasonable close correlation, or they should be exactly the same?

regards,
Neo

[neoflash]

I also did some homework about 1st order modulator. The calculated total output noise power is 2/3 (delta=2). The simulated with verilog model is close to 0.77.

Again, the simulated is more than calculated. Any suggestion?