deepamj
Newbie level 5
i hav vhdl code for aes encryption/decryption which runs fine during behavioral simulation. most parts of the algorithm are implemented using look up tables.
the synthesis went on running................... after a day's wait it got synthesised, but slice LUTs were overutilized.
similar to software, in hardware is there any means to free up and reuse some latches, once its initial function is done ?
pl anybody reply
the synthesis went on running................... after a day's wait it got synthesised, but slice LUTs were overutilized.
similar to software, in hardware is there any means to free up and reuse some latches, once its initial function is done ?
pl anybody reply