Mahen K
Newbie level 4
I am new to board design and trying to learn Signal Integrity Analysis. Attached the the actual schematic as shown in Fig 3.1 where as Fig 3.2 and Fig 3.3 are equivalent Signal Integrity Schematics. All three figures are from the first example in the HyperLynx manual. Can anybody explain how does the Fig 3.1 translate into equivalent SI Schematic as shown in 3.2 and 3.3? i.e which net in Fig 1. translate into which transmission line in Fig 3.2 and Fig 3.3?
Thanks in Advance
Mahen K
Thanks in Advance
Mahen K