only work frist time simulation, doesnt work for subsequent

I have this very simple FIFO and is part of the lager design, the signals InA_i[8:0] and InB_i[8:0] are not connected to anywhere to isolate them from the design.

I isolated them for debugging purpose. The problem is,
I simulate the code in modelsim. First time I load the design everything works fine at first run. But when I reset the code from Modelsim GUI and for all the subsequent runs except first time, InA_i and InB_i vlaues are "xxxx....". But the FIFO is working perfect. I could see the sample_0 to simple_17 as expected input values from test bench.

WHY InA_i and InB_i are "xxxx...." even sample_0 to sample_17 r there ??? They are not connected to anywhere.

WORK ONLY IN FIRST RUN AND XXXX FOR ALL SUBSEQUENT RUNS AFTER RESET...




// 18*4 bytes * number of templetes * number of pixels
rd_fifo rd_fifo(
.rst(PicoRst),

.pico_clk(PicoClk),
.picoDataIn(PicoDataIn),
.PicoWr(CounterWrite),
.fpga_rd(enable_read),
.start_porcessing(start_processing),
.sample_0(InA_i[0]),
.sample_1(InB_i[0]),
.sample_2(InA_i[1]),
.sample_3(InB_i[1]),
.sample_4(InA_i[2]),
.sample_5(InB_i[2]),
.sample_6(InA_i[3]),
.sample_7(InB_i[3]),
.sample_8(InA_i[4]),
.sample_9(InB_i[4]),
.sample_10(InA_i[5]),
.sample_11(InB_i[5]),
.sample_12(InA_i[6]),
.sample_13(InB_i[6]),
.sample_14(InA_i[7]),
.sample_15(InB_i[7]),
.sample_16(InA_i[8]),
.sample_17(InB_i[8])
);

//