Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

why clock bufer contain fall and rise equal but normalbuffe

Status
Not open for further replies.
V

vamsi_addagada

Full Member level 2
Joined
Jul 5, 2007
Messages
132
Helped
6
Reputation
12
Reaction score
3
Trophy points
1,298
Location
bangalore
Activity points
2,071
why clock bufer contain fall and rise equal but normal buffer doesnot contain rise and fall equal ?please replay
 

Re: why clock bufer contain fall and rise equal but normalb

vamsi_addagada said:
why clock bufer contain fall and rise equal but normal buffer doesnot contain rise and fall equal ?please replay
Click to expand...

Hint: Why clock signals are routed first than the normal data signals? What is so special abot clock signals?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top