Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Altium: Questions about Design Rules

Status
Not open for further replies.
M

~MJS

Junior Member level 2
Joined
Feb 8, 2009
Messages
24
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,473
clearance rule in altium

I have three questions regarding the design rules in Altium 7.0.

1) Can anyone provide me with a good explanation about Room Definition. Even after reading the wiki about it, I am still a little confused.

2) I will be placing surface mount components on both sides of my board. How do I set up my clearances to accomodate this?

- Right now I have created two clearance rules; top and bottom, and turned the default off. The top is set 10mil from the top layer or multilayer. The bottom is setup of similar. Am I missing anything with approach?

3) I have turned off the default clearance error, but I still show clearance violations whenever I move the components (after running 'Reset Error Markers'.)

Thanks for the help
MJ
 

altium rule clearance

"Room" Its used for grouping the components before placement. Suppose you are having powersupply section just you will draw a rectangle defining power room this has to be done by selcting Room property and select the components to be in that room.

Once you exported to pcb these properties will also be exported so while placing if you select the room name Power,all the components will be placed in that room in PCB
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top