Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Does Verilog-A support arrays assigment?

Status
Not open for further replies.
W

wilsons

Newbie level 3
Joined
Apr 17, 2009
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,304
verilog arrays

Does Verilog-A support arrays assigment?
Is there a method to assign an array in a single statement.
For example, a<3:0>={1,0,1,0} and suppose 1,0 is a specified level.
Thanks for your help!
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top