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Current reference for DAC

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Yarrow

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current reference

Hi

I am trying to make a current reference in 90nm CMOS that gives a stable current, approximately 4nA across a wide temperature range. (-55°C - 125°C)

Does anyone here have any experience with current references that operate in this temperature range?

From what I have experienced, it is very difficult to get a stable current across this temperature range, and it seems like a very hard task to handle. Does anyone have any views on this topic?
 

cmos current reference accuracy

I think it is better u make a voltage reference like a first or second order bangap reference circuit and then convert the voltage into current..
 

you can make a bandgap first. Then use the bandgap voltage to divide by a resistor to get a temperature independence current
 

Tnx for your suggestions.

Although, if I use resistors, wont that give an temperature dependent current?
 

All depending an your accuracy requirements.

Start that you want an accuracy similar to your bandgap 1-2%. Because of process tolerances you could use only external 1-2% resistors. So not be hurt by the offset voltages 1-10mV you should use the full bandgap voltage 1.2V. So an external 1-2% resistor in the 20MOhm range give you a 40nA reference current. That should be internal scaled. There are higher resistors value for the external resistor avaiable but they tend to less stable. Also the leakage currents at the pin protection network stat to decrease accuracy. So 4nA is demanding.

The next solution is to use a kT-generator and use the small VT*ln(area-ratio) voltage for an smaller external resistor and try to scale out the kT-temperatur dependence with a temperature dependend mirror ratio.
 

    Yarrow

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How to realize a temperature dependend mirror ratio? Sound difficult?
 

Tnx for the replies!

I have altered the design to use a ~250nA reference, this way I made the task of making a stable current reference easier, although I have put this task aside for a while.

I did try to make a current reference using DTMOST's and dividing the current, but monte carlo simulations showed a to wide spread.

There is alot of mismatch in 90nm technology, so i think the way to go is to make a somewhat unstrict current reference in addition to a reference calibration scheme.
 

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