problem with high speed data transfer

I'm trying to work on communication between two board A and B equipped with FPGA,440 bits data must be transfered from A to B in 3 us,
there are three lines for communication.In addition,there are 8 A boards must communicated with B simutaneously, I use DS coding to transmit,
which works at 200MHZ for communication of one A and B,but when it comes to communication of 8 A and B,it doesn't work even at 100MHZ,probably
it's because crosstalk.I don't know how to solve this problem?Anybody has solution?Perhaps I can change the way of communication,but what else
communication protocol can I use? I don't have many experiences about design of FPGA,can anybody help me to work this problem out,any suggestion
is appreciated.
PS,board A contains virtex2,board B contains virtex4,so SERDES is not suitable here.
board A has only virtex2,nothing else processor.
board B has only virtex4,nothing else processor.

some supplements here:
No data should be transferred from B to A.
I use LVDS for the interconnect
I just did the test in only B board,which means B sends and B receives it back.
For one link,it workes reliably.
But for more than one link,it doesn't work,the received data is wrong.when I do post simulation in questasim,more than one links receiver have unknown state.even if I reduce the speed to 100 MHZ,I don't know why.