Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Vdd Scaling for standard Cells in AMS 0.35u

Status
Not open for further replies.
E

eda_wiz

Advanced Member level 2
Joined
Nov 7, 2001
Messages
653
Helped
58
Reputation
116
Reaction score
29
Trophy points
1,308
Activity points
6,195
ams 0.35

Hi folks,
am designing a digital chip in AMS .35u library. Inorder to reduce power I would like to used a scaled Vdd of 1.2 V instead of the 3.3V (nominal) specified by the vendor.
The has been simulated correctly in Nanosim with the scaled Vdd. However I am unsure whether DRC (esp transition)will be satisified. Pleas give ur comments.

have anyone used lower Vdd(than specified) for digital design , please help..


tnx
eda_wiz
 

ams 0.35u

I would imagine that you will be operating outside of the charaterised range of the libraries that you have - therefore, you can't rely 100% on the results you will get from digital tools. You can often ask a fab to characterise the standard cells in a new corner for you (with your specified Vdd), although this will cost. If you can't afford that, you will probably just want to simulate as much as you can in nanosim. (You might find it useful to compare nanosim timing with what is calculated in the digital tools - then overconstrain the design constraints to add some margin)
 

    E

    eda_wiz

    Points: 2
    Helpful Answer Positive Rating
vdd scaling

Well basically what you have verified is that the devices offered in the process design kit function at a lower voltage(1.2V). At this point this will have nothing to do with your DRC (assuming PDV) since you will be using the same layout. However simulating a standard cell does not gaurantee that it will work on silicon. It has to be defined in the process spec that your devices perform correctly at those lowered voltages and prefereably somebody has put a testchip together to verify this.

As a side note i would like to promote the website www.rtl2gates.com here.

Thanks
www.rtl2gates.com
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top