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implementing 16:1 serialization using Xilinx OSERDES

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jeremylbt

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Help Needed!!!

How do i implement a 16:1 serialization using Xilinx OSERDES given that the OSERDES core has a maximum input of 10 using DDR mode?
 

Re: Help Needed!!!

Why not make the interface 8 bits wide and then write the data in two accesses?

Radix
 

Re: Help Needed!!!

Hi Radix,

Thanks for ur suggestion. But can u elaborate on your point? Does it coincide with the attached drawing?
 

Re: Help Needed!!!

jeremylbt,

Yes, that's kind of what I was thinking. The drawback is that now when you go to combine the 1-bit outputs of the two serdes blocks you'll have to run that clock at twice the speed compared to if you only had a single 16:1 block.

Radix
 

    jeremylbt

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Re: Help Needed!!!

radix said:
jeremylbt,

Yes, that's kind of what I was thinking. The drawback is that now when you go to combine the 1-bit outputs of the two serdes blocks you'll have to run that clock at twice the speed compared to if you only had a single 16:1 block.

Radix

FYI i've found a solution to the above issue. I split my 16bit input data into 2 8bit data and multiplex them into a pair of master/slave serdes to get a 1 bit 16:1 serialized output.

Thanks for your help!!
 

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