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  1. #1
    Newbie level 1
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    fir cic fpga

    Hi All,

    I am working on master thesis in SDR based on FPGA.
    I have been trying to work out how to design the CIC / FIR filter pair in
    the DDC section of this design.
    I need a help to understand the main operation of these filters.
    Hopefully someone out there will be able to help.

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  2. #2
    Newbie level 6
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    design cic

    you can download some paper from IEEE which can help you much.
    An economical class of digital filters for decimation and interpolation.pdf
    This paper is a good paper and it introduces CIC filter first.



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