A question about using models for transistors in Hspice

Hi,
When simulating a circuit that has several transistors in Hspice, we do not determine the model (one of the models that is defined in the library, for example nch.1 to nch.12) used for each of the transistors. When we run the simulation the software itself considers a model for each transistor (one of the 12 models randomly). Isn't it better that we define one model (for example nch.1) for all NMOS transistors and one model for all PMOS transistors? This will reduce systematic offset. Is this way right or wrong?
Why don't we do this?
Does it have something to do with technology and process?
Any ideas?

Hi,

The concept behind is different from u r understanding.

Hspice won't choose the models randomly !!

foundries provide models in two ways 1 is binning based models

Binning based models:

Here the available/ allowed device W/L will be divided into bins(segments) Normally there will be 10- 15 bins. so the parameters available for nch.1 is best fit for selected range of W & L.
if u go thro the model card u can find Lmin,Lmax Wmin & Wmax values for each bins.

So when u simulate a netlist with many mos and use a library with binning then Hspice will select the bin check nch.1 to nch.n and will pick the model parameters based on u r w/l value in the instantiation of MOS.

If its not able to find, then it will report error.

So the model selection is not random.

Hope this helpls.

thanks,

Hi,
Thanks for your reply. I got it. But what is the other way foundries provide the model?

simple, single model for whole geometric range. two major's follow these two ways.

Thnx,