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PLL MODELING FOR CLOSED/OPEN LOOP TRANSFER FUNCTION

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DEVON

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Hello friends,

I have a pll that was designed and I want to find it's transfer

function, for closed/open loop.

What are the methods that I can use in order to model it in spice(transistor level)

I don't want a behavioral model/verilogA but an electrical model for

continuous time - I want to use the charge pump from the design and to

model all the loop using extra voltages/current sources( in order to model the

pfd/vco)

Thanks
 

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