Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
LOC is sequential, since it is essentially a double capture, and the ATPG tool needs to be able to store the state of the circuit after the last shift and first clock pulse of the capture in order to know what is expected after the second capture clock.
LOS is essentially the same as a simple stuck-at, since there is only one clock pulse during the capture. No second state needs to be stored by the ATPG to determine how the circuit will react after the second clock pulse.
If you don't get an answer here, visit DFT Forum - there are DFT practitioners hanging out there that can answer your question...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.