lqy
Member level 3
From some examples, I found many power DMOS layout using the "interdigited" structure on the top metal.
If I only use half area top metal to Source/Drain, that is to say, half area for source and half area for drain, are there any different? Thanks a lot.
If I only use half area top metal to Source/Drain, that is to say, half area for source and half area for drain, are there any different? Thanks a lot.
