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Delta Sigma ADC Noise simulation cadence

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olzanin

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cadence transient noise

Hello,

I want simulate my first first order delta sigma ADC, attached schematic. I can simulate it and I see behind the LP again my input signal.

My problem is I cant see the noise shift to higher frequency. I simulate transient and adjust transient noise (noisefmin noisefmax and noisescale) measure it at the input (DFT) and compare with the output (DFT) but don't see shift to higher frequency, the noise isn't less on the output!

My question is:
1.) Can delta sigma with first order shift the noise or shall I design higher order?
2.) Is there some other way to simulate with noise or calculate the SNR on the input and on the output?

Thanks!

Olzanin
 

adc simulation in cadence

You are doing a transient noise simulation?

Transient noise simulates circuit noise (thermal, flicker, etc). The sigma-delta will shape any noise that is injected after the integration (most notably, your quantization noise). Much of your circuit noise occurs before integration. The input resistors to the integrator, for example.

If you don't see noise shaping, this indicates that your circuit noise is well above your quantization noise.

If you have any further questions, let me know.
--
Poojan
https://www.circuitdesign.info
 
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    jdp721

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transient noise simulation

Hello,

thanks for the answer. I think I misunderstood!
Now :
Delta Sigma ADC shifts only the quantization noise (that is the advantage regarding common ADCs), not the noise that comes with the signal on the input. If I include noise behind the Integrator the noise should be shifted?

Regards,

Olzanin
 

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