venkat25
Junior Member level 2
Hi Friends,
I am new to vlsi field. I have generated the synopsys std cell library using spice
tool. I just need to check my library syntax in the synopsys tool. so i need to
know through which synopsys tool i can verify my library.
And i also want to know which commands are used to compile my library.
Thanks & Regds
Venkat.
I am new to vlsi field. I have generated the synopsys std cell library using spice
tool. I just need to check my library syntax in the synopsys tool. so i need to
know through which synopsys tool i can verify my library.
And i also want to know which commands are used to compile my library.
Thanks & Regds
Venkat.