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Switch Cap integrator design

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cinch

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Hi,
I am designing a switched cap LPF to average out a square wave. The frequency of square wave is 10kHz. The magnitude of the input square wave varies. The circuit should give an output which is the mean of +ve and -ve amplitude of the square wave.
For eg: If input square wave is varying from 1V to 1.2V, the output should give 1.1V. If input sqaure wave is varying from 1V to 2V, output should be 1.5V, etc.

I have tried simple switch capacitor LPF, with switching frequency set to half of input signal frequency. It works for sine wave input but it doesnt work for square wave input.

thanx in advance for suggestions.

Regards,
Cinch
 

cinch said:
Hi,
I have tried simple switch capacitor LPF, with switching frequency set to half of input signal frequency.
Cinch

Are you familiar with S/C techniques ? You should know that the clock frequency should be at least 50 times higher than the filtered signal frequency.
 

Hi,
I know that clk frequency should be much higher than signal frequency only when u want that signal at output without distortion. But in my case, I dont want the exact signal, but i want the average (mean) of the signal. For this to happen, clock frequency must be lesser than signal frequency. If i give a sine wave with 1V to 2V amplitude, i need a DC output at 1.5V.

Hope u understood the requirement.
 

But, in this case it is not an usual S/C technique, is it ?
Question: Is there a continuous RC equivalent for the circuit you are going
to develop, for instance an integrator stage or something else ?
 

Hi,
Yes... if i put simple 2 stage RC filter whose time constant is same as (or more than) switiching frequency, then i get the average of the input signal. But the value of R needed is about 1Mohms and the settling time of this ckt is 1.5ms... This is not feasible. Ckt should be up in atleast 100u-200us.
 

cinch said:
Hi,
Yes... if i put simple 2 stage RC filter whose time constant is same as (or more than) switiching frequency, then i get the average of the input signal. But the value of R needed is about 1Mohms and the settling time of this ckt is 1.5ms... This is not feasible. Ckt should be up in atleast 100u-200us.

That means, the average value should be available within one or max. two signal periods, right ? Certainly, there is no standard solution of the problem.
Did you perform already some simulations for different approaches ?

Added after 31 minutes:

I´ve just done the following: I have forgotten everything you have mentioned in context with your approach - and I have concentrated only to the task.

And something different has come into my mind:
Do you know the principle of dual slope A/D conversion ? I have not thought about this in detail but there might be a solution - that means: principle of up and down integration. Not to measure the time (like for A/D converters) but to find the average value by integration upwords and then downwords with another time constant.
 

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