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Manual Place and route

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sandeep_sggs

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Dear all,
Can anybody tell me what is the significance of Manual "place and route" in Xilinx tools ( i Use xilinx9.1) and how to do it in DETAIL! Is manual process really useful considering the Good place and route algorithms embedded in vendor`s tools. i may be wrong, so please rectify me if so is the case!
Any good document for this subject is welcome. plz make it as early as possible..
 

This is the ASIC forum, I think this question would be better put in the FPGA forum.
But generally speaking, any design of signifigant size you're going to want to use the automatic place and route. Maybe only use manual place for a few instances on critical paths or for DRC violations.
 

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