kil
Member level 5
Hi All,
How the below code infer during the synthesis....
module infer (q,d,clk);
input d,clk;
output q;
reg q,p;
always @(posedge clk)
begin
q = p;
p = d;
end
always @(posedge clk)
begin
q <= p;
p <= d;
end
always @(posedge clk)
begin
p <= d;
q <= p;
end
always @(posedge clk)
begin
p = d;
q = p;
end
How this above logic will infer...... since it consists of blocking and non blocking statemnets .....
Please give your feedback on this
regards
kil
How the below code infer during the synthesis....
module infer (q,d,clk);
input d,clk;
output q;
reg q,p;
always @(posedge clk)
begin
q = p;
p = d;
end
always @(posedge clk)
begin
q <= p;
p <= d;
end
always @(posedge clk)
begin
p <= d;
q <= p;
end
always @(posedge clk)
begin
p = d;
q = p;
end
How this above logic will infer...... since it consists of blocking and non blocking statemnets .....
Please give your feedback on this
regards
kil