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Subthreshold related question

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solidrepellent

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Hello all,

1) We know that the threshold voltages for NMOS (assume 130mV) and PMOS (assume 190mV) are different. When researchers say that a particular circuit (assuming a complementary CMOS circuit) operates at subthreshold level do they mean that it operates below the minimum of those two thresholds. In this case below NMOS threshold voltage level ?

2) When can we say that a sub-threshold circuit is working properly? Is it when the output swing is 10% to 90% of Vdd ? or is there any other criteria that needs to be looked at?

Assuming Vdd = 1.2V.

Thanks in advance,
Naveen.
 

subthreshold regime defines working regime of one transistor. in one circuit not all of the transistors have to work in the same regime. So, if you are looking at an NMOS, then you should check if the Vgs<Vthn, if you are looking at an PMOS, the criterion is Vgs<Vthp.
 

solidrepellent said:
Hello all,

1) We know that the threshold voltages for NMOS (assume 130mV) and PMOS (assume 190mV) are different. When researchers say that a particular circuit (assuming a complementary CMOS circuit) operates at subthreshold level do they mean that it operates below the minimum of those two thresholds. In this case below NMOS threshold voltage level ?

For my opinion, if a circuitry is said to work at subtreshold level this belongs to both transistors. Do you think of circuits working in the log domain ?
 

As malizevzek said, I too think that subthreshold regime is defined for a single transistor. If we are looking at a NMOS then it would be in subthreshold when Vgs<Vthn. Similarly for PMOS. But I have been reading some papers (https://mtlweb.mit.edu/researchgroups/icsystems/pubs/journals/2005_wang_jssc_jan.pdf) where they talk about threshold voltage of an FFT processor which can be scaled down. They run simulations by changing threshold voltage. I would like to know threshold voltage of what they are scaling down. Is it PMOS or NMOS or some kind of a nominal threshold voltage they found ?
 

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