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Inferring Vs Instantiation ??

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vishwa

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Hello,


In an interview, i was asked about the difference between inferring logic and instantiation of components in an FPGA.

Pls help me.


Thnaks,
Viswa
 

A helpful page from the Xilinx ISE documentation:
**broken link removed**
 

Hi,

Thanks for the reply. I have gone through the given link.

But I couldn't understand it properly.

Can anyone explain me cearly with examples. How to infer logic in HDL and what would be the output after synthesis.


Thanks,
Vishwa
 

Here's a Verilog inference example. The synthesis tool recognizes (infers) the 8-bit up-counter with synchronous clear, and generates an appropriate register with adder logic.
Code: 
module top (clk, clear, count);
  input             clk, clear;
  output reg  [7:0] count=0;

  always @ (posedge clk)
    count <= clear ? 0 : count + 1;
endmodule

If you simply drop a "COUNTER" module from your synthesis tool's library into your HDL, that's instantiation. Of course, your library may not have a COUNTER module, or it may have a different name, or it may have different I/O signals.
Code: 
module top (clk, clear, count);
  input             clk, clear;
  output      [7:0] count;

  COUNTER #(.WIDTH(8)) u1 (.CLK(clk), .CLEAR(clear), .OUT(count));
endmodule
Either way, you should get very similar register/logic results in your FPGA/CPLD.
 

inferring is the logic which tool generate automatically which you dont describe....
instantiation is the logic which tool generate which you describe....
 

along with all the previous post..i would say inferring logic makes design portable across different platforms\vendors..
 

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