puzzle question about decoupling cap.

Hi, folks

Here I bring up a quite simple question, but I'm a little lost.

Attached is the schematic of the pmos current mirror consisting of M1 and M2. The common practice is to put a capacitor C between the power supply and the gates of M1/2. My question is that what the capacitor C does for?

1. removing the AC noise coupling to the gates of M1 and M2.

OK, that sounds good. BUT how about I connects the cap C between the gates and gnd. Also it can do the same thing, right?

2. Someone will say that inserting the cap between power supply and the gates can improve the PSRR by keeping the Vgs of the transistors somehow constant.

OK, if you argue this way, I can think that without the capacitor C the Vgs of M1 also can sort of be kept constant if the current source is good.

So I come to the dilemma: Can I just connect the cap either to ground or power supply??

You know there is noise in the VDD, and the voltage noise will change to current noise.
But if you add this capacitor, the Vgs will be constant especially in high frequency domain.
So the high frequency noise will be filter out.
I think this is the purpose of it.

using a capacitor to ground couples the supply noise to the output current.
so either u use the capacitor to vdd or don't use it.

As mentioned earlier posts, the whole idea is to keep the Vgs const.
So whatever the noise Source of PMOS is going to see in high frequency, the Gate voltage of PMOS will track the same due to capacitance ( will be shorted at high frequency). Hence the PSRR will also improve.
Putting the cap between GND to Gate won't help as Vdd noise doesn't track the GND noise.

Firs of all, thanks for your replies. All of the posts talk a lot of sense to me.

But I just wonder if this decoupling cap can be connected to ground as the current source underneath M1 is pretty good (though not really ideal one).

For this case the pmos gate voltage also can track the source voltage as noise coupled to the source of the pmos since the current of pmos transistor tends to keep constant due to the "good" current source.

Does it make some sense?

nop, it doesn't

safwatonline said:

nop, it doesn't

Click to expand...

If we can assume the "good" current source (underneath the pmos M1) is ideal one, I don't think the power supply noise can degrade the current mirror even without the decoupling cap between power supply and gates of m1/2. So it implies that the impedance of the current source is playing in the game.

using an ideal current source is good in DC, in AC it doesn't exist so the capacitor to ground that u are adding is shorting the gate of M2 to ground at some frequency, when u short the gate to ground then the noise on the supply is acting as a source applied to M2 in common gate configuration which means that the current is proportional to gm*Vdd and hence PSR degrade.
hope u get what i mean.

safwatonline said:

using an ideal current source is good in DC, in AC it doesn't exist so the capacitor to ground that u are adding is shorting the gate of M2 to ground at some frequency, when u short the gate to ground then the noise on the supply is acting as a source applied to M2 in common gate configuration which means that the current is proportional to gm*Vdd and hence PSR degrade.
hope u get what i mean.

Click to expand...

If you really can attach a "ideal" current source to the pmos M1, the whole current in M1 is always constant.

So how can the power supply noise have an impact to the constant current?

I thought, that the purpose of current mirror would to source a constant and low noise current at M2. If you don't like it low noise, connect the capacitor to ground instead of VDD...