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Low Level vs High Level Logic

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engrbabar

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Why do we use low level logic instead of high level logic? What are its pros and cons and when should we use it and when not?
 

do you mean the design level such as physcal, gate , rtl, architeture, system?
 

engrbabar said:
Why do we use low level logic instead of high level logic? What are its pros and cons and when should we use it and when not?

low level (logic low) means zero and high level (logic high) means one.

According to my knowledge in most of cases in digital, logic low means ground or zero voltage and high means greater than zero voltage (Approx. greater than component's lower limit to active) most of times its equal to +VCC, which mostly common to whole circuit. some times it happens, this voltage is not suitable for all components present on the circuit bcoz it can damage components due to its voltage capability and limits as per manufacturing details.

this is the one of the reasons for selecting low level rather than to high level logic.
 

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