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i think u'd better show u design 's memory type: DDR or DDR2 or SDRAM ,flash...
there is some suggestion follow:
1:the clk should be long distance with other signals
2:be care of the diff-length and distance of the addr_bus and the data_bus.
3:the power and gnd.
if the freq is not too fast,be care of these is enough...
KungFu just do a search of the Xilinx website for signal integrity but if you really want to learn about this topic you should look into the books or the seminars by Howard Johnson.
moore, from your post I would have to say you dont have any idea about signal integrity. I would recommend that you do some reading on the topic and you will see there is more to it than what you tried to surmize.
Iouri, it doesnt have to be Xilinx but they are a good place to start and the OP did ask about training material from Xilinx.
As for Howard Johnson and Eric Bogatin, they are great sources to go to for SI related stuff however, the can be a bit overwhelming for someone new the SI.
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