VingTor
Newbie level 2
bist module scan test
Hi
I'm developing a circuit for evaluation of fault models and bist logic (master thesis). So far I have made a circuit consisting of one CUT (circuit under test), BIST logic and clock controller.
The CUT is run through DFT compiler and scan is inserted into it. FC is 99,8% when I use Tetramax as ATPG.
Now I want to use the vectors generated from my bist logic instead (LBIST/STUMPS), and get tetramax to evaluate the FC of these vectors.
My question is how can I do this?
I tried to just make a EVCD dump from the CUT when running a BIST simulation but can't get tetramax to understand what I want it to do.
My best guess now is that I have to run a BIST simulation and write the scan inputs (vectors) and outputs (responses) to a file and then write a program that makes a verilog pattern file similar to those tetramax makes...
Suggestions?
Hi
I'm developing a circuit for evaluation of fault models and bist logic (master thesis). So far I have made a circuit consisting of one CUT (circuit under test), BIST logic and clock controller.
The CUT is run through DFT compiler and scan is inserted into it. FC is 99,8% when I use Tetramax as ATPG.
Now I want to use the vectors generated from my bist logic instead (LBIST/STUMPS), and get tetramax to evaluate the FC of these vectors.
My question is how can I do this?
I tried to just make a EVCD dump from the CUT when running a BIST simulation but can't get tetramax to understand what I want it to do.
My best guess now is that I have to run a BIST simulation and write the scan inputs (vectors) and outputs (responses) to a file and then write a program that makes a verilog pattern file similar to those tetramax makes...
Suggestions?