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how to simulate a SDRAM model with my SDRAM controller?

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chenx

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Hi!! I am using Quartus 2 3.0 and I dont know how can i use a SDRAM model to know if my SDRAM controller works! I downloaded the model from a web in Verilog but when i compile it fails!
what is the procedure to follow?
If someone knows please could you help me?
THANKS
 

If your controller is VHDL then try to find a VHDL sdram model (try Micron website). Next step is to create a testbench where you connect your controller to the sdram. I can advise you to simulate with Modelsim, it is easier and much faster then simulating with Quartus. This was also suggested by our Altera FAE!

Greetings,
Dreeke
 

check the error list that had benn produced and check that if some libraries is required to complete the compilation process. Also, I encourage you to do the taske using Mo/del sim.
 

how to find a good sdram model for simulation?
 

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