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PNP Non-Inverting Driver

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Hi,

Bellow shown the PNP driver circuit.

Please anyone can tell me why the input=LOW then the Emitter=UN-know logic? The design is it correct? The 7405 output is open-collector, If the 7405 input is un-know logic so what is the actual 7405 output?

How to design the Non-Inverting Driver using PNP transistor?

Thank You
 

The design is correct, as far as the Emitter-follower circuit is concerned, but logic levels are not ..
The VIL (input-low-level-voltage) for TTL family is <0.8V and this circuit produces voltages above that level (with input at or within <VOL - output-low-level-voltage) ..

"Unknown logic" input may be misinterpeted by the 7405 gate as a 0, a 1, or simply noise ..

One PNP transistor can't be used as non-inverting TTL buffer/driver ..

Regards,
IanP
 

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Hi,

May i know, how can i improve the design?

Thank You.
 

I am afraid you can't do much about single-transistor non-inverting-driver, however, by re-configuring it and adding second stage you can design a working TTL non-inverting-driver .. see picture below ..

Regards,
IanP
 

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