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  1. #1
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    cdl netlist procedure

    how can I extract a Vsource into netlist use CDL method?
    there is a voltage source vdc in my sch but doesn't shows up in the CDL netlist, is this a cadence problem or I miss some key setting?

    •   Alt11th October 2007, 08:59

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    cdl netlit procedure

    vsource no CDL view.



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    aucdl res $sub=

    but actually, there is a view named auCdl in analoglib for every vsource, such as vdc, vsin ..so, that's the config of cadence?



    •   Alt11th October 2007, 13:45

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    Questions about CDL netlist with Vsource

    The auCdl netlisting procedure supports the following devices: FET, CAP, IND, DIODE, BJT, MOS and RES.
    But, why do you want to translate vsource into auCdl netlist?



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    Re: Questions about CDL netlist with Vsource

    because my sch is big and need several different stimulations for different port.
    and I'll use hsim as the simulator, so I need to transform a virtuoso sch to a spcie netlist, that's why I need an entire netlist contains vsources.



    •   Alt12th October 2007, 02:06

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    Questions about CDL netlist with Vsource

    But every simulator has own sources, and distinctly. Even if you translate successfully, the simulation is unsuccessful probably.



  7. #7
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    Re: Questions about CDL netlist with Vsource

    o. but I need only a standard hspice netlist, so may the hspiceD simulator could generate a proper netlist.



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