Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Writing data to on board DDR SDRAM on Virtex II Eval board.

Status
Not open for further replies.
S

suddy72

Member level 2
Joined
Jun 28, 2007
Messages
50
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,694
Hi everyone.

I have recently setup the XUP Virtex II Pro Evaluation board. i have managed to get this board working and running simple programs.

I now want to be able to write data to an on board DDR SDRAM card. Does anyone know how i go about this ? i have tryed reading the user guide but i does not really give u walk through of how to do this. All i really want to do just now is a simple thing like store the values of an output in the RAM.

I was thinking of just taking the values on the user LEDS and storing them.

any help would be much appreciated.

Thanks,

Stuart
 

Re: Writing data to on board DDR SDRAM on Virtex II Eval bo

Unless you have somehow erased it the eval kit comes with a DDR controller already installed. This will take care of the clocking, handshakes, etc. You will just need to write some code to provide the data to the datapath.

For more info take a look at Xilinx appnote XAPP688 and even do a search on DDR on the Xilinx website as well.

Hope this helps.

E
 

Re: Writing data to on board DDR SDRAM on Virtex II Eval bo

thanks,

You dont have any example code of using this do you ?
 

Re: Writing data to on board DDR SDRAM on Virtex II Eval bo

The code should be provided with the kit. Look at the CDROM that should have come with it.

E
 

Re: Writing data to on board DDR SDRAM on Virtex II Eval bo

hey does the eval version has coregen... you can generate a HDL model file for the RAM in your fpga... when you fuse it this HDL model will be mapped to the RAM in your fpga... hope i'm right...
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top