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simulation shows the problem of current mirror mismatching?

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katrin

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I am doing some simulations of two multistage CMOS current mirrors including PMOS and NMOS current mirrors.
In principle, their output currents should be the same when the current sources and the amplification factors are the same
But in fact, the output currents of these two multistage CMOS current mirrors have 2% different in the schematic simulation.

I am confused about that. Even if the mismatching problem exits, it should only show up in the post-sim including layout, but not in this schematic simulation.
 

Re: simulation shows the problem of current mirror mismatchi

What do you mean by "multistage current mirror" ?

Please include a schematic to clarify
 

    K

    katrin

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Re: simulation shows the problem of current mirror mismatchi

The error you are seeing is the systematic offset. Surely transistors in the same mirror have different Vds. This makes the output current to be different from the input current. You should make, by using regulated mirrors, both Vds to be the same.

Additionally, do not forget to make Monte Carlo simulations as the mismatch between transistors also contributes to the total error. Even MC simulations from your schematic will show you that. No need to go to post-layout sims to see the effect. Post-layout sims will show you parasitic contributions and path mismatch effects, which add to the previous errors.
 

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    katrin

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Re: simulation shows the problem of current mirror mismatchi

Humungus said:
The error you are seeing is the systematic offset. Surely transistors in the same mirror have different Vds. This makes the output current to be different from the input current. You should make, by using regulated mirrors, both Vds to be the same.

Additionally, do not forget to make Monte Carlo simulations as the mismatch between transistors also contributes to the total error. Even MC simulations from your schematic will show you that. No need to go to post-layout sims to see the effect. Post-layout sims will show you parasitic contributions and path mismatch effects, which add to the previous errors.
Click to expand...
agree with humungus...
 

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    katrin

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I have also found the same problem as katrin
considering the small difference between the two transitors,I did not pay much attention,but from Humungus's viewpoint,I realize that there is still a long way to go,thank you
 

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    katrin

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