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Do real commands in Verilog are synthesizable?

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rajsrikanth

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hi every one

i have a doubt regarding verilog, in verilog we have real command and is it synthesizable and can be downloadable in xilinx fpga's

thanx and regards
raj
 

Re: help on fpga coding

you mean the variable type 'real'? No it is not synthesizable. For a profound understanding of the internals refer to "Verilog HDL Synthesis: A practical primer"
 

help on fpga coding

XST doesn't support "real" type in Verilog or VHDL. Maybe someday in the future, but not today.
However, ISE includes the "Floating-Point Operator" core. Maybe it will help you.
 

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