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Re: difference between power gating and clock gating
Power Gating:In a processor chip, certain areas of the chip will be idle and will be activated only for certain operations. But these areas(cmos) are still provided with power for biasing. The power gating limits this unnecessary power being wasted by shutting down power for that area and resuming whenever needed.
Clock Gating: clock gating limits the clock from being given to every register or flops in the processor.In clock gating the gated areas will still be provided with bias power.
Re: difference between power gating and clock gating
Power gating is used for reducing LEAKAGE POWER by switching off power supply to the non operational power domain of the chip during certain mode of operation. Header and footer switches, isolation cells and state retention flip flips (SRFFs) are used for implementing power gating.
Clock gating is used for reducing DYNAMIC POWER by controlling switching activities on the clock path. Generally Gate or Latch or FF based clock gating cells are used for implementing clock gating.
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