Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to simulation ADC SFDR/ENOB/INL/DNL by hspice ??

Status
Not open for further replies.

andy2000a

Advanced Member level 2
Joined
Jul 18, 2001
Messages
597
Helped
14
Reputation
28
Reaction score
8
Trophy points
1,298
Activity points
5,298
adc sfdr

How to simulation SNDR on hspice ?? someone said use .Four Fin
and will find THD , SNDR=THD
 

finding enob of adc

So Hspice means pure analog simulation. So you get a anlog vector of a digital signal. So you have to convert to 1bit per sample. So write the vector as asci. Read into Matlab. Convert to 1bit and sample at the right point. So you get much shorter vectors than the Hspice result because for each period of the sample clock you have 100s of time samples placed irregular. Compose from the 1bit vectors a integer number vector. Then make the analysis in Matlab with the help of the toolboxes.

With mixed mode spice simulators supporting some HDL you can write the same stuff running as analysis bench withhin the simulation. But I think it is not possible in Hspice.
 

sfdr inl

I use hspice simulation THD ..

1. use ideal DAC convert ADC output to analog signal
2. use .four freq v(out)
and use THD equation

ENOB = (THD- 1.76 ) /6.02

but simulation THD is small , ENOB looke like very small ..
someone said hspice must be choose correct cycle time for FFT simulation
I don't know know to write ENOB code for matlab

if I use hspice simulation ADC .. I can write down ADC output value
but how to simulation INL/DNl/ENOB by matlab ??
and ADC need how many cycle ? or just only need 1 cycle A/C convert ?
can you give me matlab code ?
thank you
 

sfdr in adc

Sorry, I did not have the code. I heard about it because of the troubles users have with postprocessing spice results.

Indeed, you need to use a rectangular window for FFT and put in a integer number of sines. Then after some decay time of initail transients you will be free of spectral leakage. So ENOB is calculated from the ratio of sine power to every other signal power. I don not know the exact formular, but it is not a simple THD.
 

adc enob code

The algorithm to calculate INL and DNL using the histogram method is presented here.

Joey Doernberg, Hae-Seung Lee and David A. Hodges, “Full-Speed Testing of A/D Converters”, IEEE Journal of Solid State Circuits, Vol. SC-19, No. 6, pp. 820-827, December 1984

BAstos
 
  • Like
Reactions: lamoun

    lamoun

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top