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How to display 16 bit binary number on Seven Segment?

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MSRA

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How to display 16 bit binary number on Seven Segment....? without using mcu
 

Re: 7 segment

are you planning on displaying in decimal format or using binary form(i.e. one bit each in one 7 segment display).....
 

Re: 7 segment

MSRA said:
How to display 16 bit binary number on Seven Segment....? without using mcu
u can use BCD convertor i.e binary to decimal ic like7447 and 7448 .
 

Re: 7 segment

A.Anand Srinivasan said:
are you planning on displaying in decimal format or using binary form(i.e. one bit each in one 7 segment display).....

decimal format.....

well if i use decoder like 7447 then its input will be 4 bit and output of 8 bit...so breaking the 16 bit output in 4 bit make them bcd again ...
 

Re: 7 segment

I have tried to make it before.

You need first to change the binary to BCD which is not an easy job for large number of bits (you need to make correction circuit for lsb's and then to the higher bits and so on).

I think the mcu is an easier route ,as in many cases this displaying is a small part of larger system. And this is the reason that made me to stop from making it without a mcu.

{I assumed that you are displaying the binary no. in decimal format}
 

7 segment

well can u tell me the way to make correction circuit for lsb's as what u mentioned......
if u have any schematic for it
 

Re: 7 segment

ok as you wish, but i think that you will need a programmble device any way as the circuit is n't simple.

If you write down the binary equivalent of the no's from 10 to 15 you will find that either the 2nd and 4th bits are simultenously 1(high) or the 3rd and the 4th are simultenously 1(high) so these conditions can be used to detect that these BCD no. is wrong and the correction circuit in this case shall add 1 to the next BCD 4-bits and correct the past 4-bits.

The correction is done by adding 6 (0110) to the invalid BCD 4-bits, and the result will have 1 in the 5th bit(as a carry) which is needed-as mentioned- to be added to the next 4-bits(also you can conclude this from listing the invalid no's).

And here another error starts to appear; when adding the binary no. 0110 the 1st BCD 4-bits have no problem(and by this way they are corrected) but the next BCD 4-bits to which 1 is added may have a problem, the same 2 coditions used before are applied in addition to ather condition which is if result of adding the 1 to the 2nd 4-bits have a carry the resulatant 5 bits are wrong as BCD no's and also needs to be corrected.And you will apply these corrections to each 4-bits till you finish the original no (16 bits) in addition to the bits generated form the corrction operation. Note that the no. of bits you get in BCD for 16 bit binary no is4×{1+ Integar of log(2^16)}= 20 bit.
If you still needs the schematic I will post it but as you notice this technique is appropriate only for small binary no's.

After doing all of this corrections you will use 5 ×7447 or the other IC.
 

7 segment

yeeeh
it seems to be difficult but plz post it
it might give some other idea..
do u know any ic to convert 16 bit binary to 4 pairs of 4bit bcd or any thing related to it...?
 

Re: 7 segment

Hi MSRA,

You could use two sets of counters, a 16 bit parallel load binary down
counter and a chain of five cascaded BCD up counters which share the
same clock. As the binary counter counts down, the BCD counters will
count up. When the binary counter reaches zero the BCD equivalent
will be present at the outputs of the BCD counters.
It's simple but it's slow.

on1aag.
 

Re: 7 segment

I am sorry for two things ;1st I am late in reply(I was busy for a time), 2nd I said that 16-bit binary no. equivalent to 24-bit BCD no. but it is equivalent to 20-bit BCD no.
(1111 1111 1111 1111)b = ( 6 5 5 3 5 )d = (0110 0101 0101 0011 0101 )BCD
[accuratly all the bits won't exceed 19 ]
,and I said that for the 1st 4 binary bits we will have only two conditions but they have three the third condition is on the 5 th bit for example( (1 0000)b = (1 6)d = (0001 0110 )BCD )
As I draw this ct from along time so I forget those details I mentioned, also I lsot the schematic so I will draw it again and post it but this will take a time to be sure of the functionallity.

But I think using 2 counters is a good way though I didn't know how we will get the extra bits in the BCD code.
 

7 segment

How about using a 64Kx35 ROM? Feed the 16-bit number into the ROM address, and then connect the 35 outputs directly to the segment pins of the five digits (plus some current limiting resistors). Or, with a little extra ingenuity, use a 512Kx7 ROM plus a few CMOS chips to scan the digits.

How about using an FPGA or CPLD? You could then design the logic in Verilog or VHDL.
 

7 segment

It is not allowed to do...
well can u tell me if a use binary to bcd converter the when the input is of 8 bit binary let say 154 the output of the ic which is in bcd form is the bcd of 154 then its of 12 bit each four bit conytains bcd of 1 then 5 then 4 ..
is it really happens?
 

Re: 7 segment

read Digital fundamentals by Thomas Floyd
 

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