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CMOS transmission gate

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firsttimedesigning

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cmos imelt

i am having trouble to figure out how to design a CMOS transmission gate. I dont know what voltage should i put for +Vcc and -Vcc. I have tried several different values, 1,2 and etc. However, Cadence Spectre always gives me a warning message that says the "the bulk drain junction current exceeds 'imelt'...". I want to know what is the value of imelt. Also is there an equation for the bulk drain junction current? Finally, what value of Vcc should i use to prevent the junction current exceed imelt? thanks in advance.
 

cmos transmission gate

1st question : What are the transistors you are using - high voltage or low voltage?
2nd question : why should you connect nmos bulk and gate to -vcc?? cant you just ground them?
3rd point : Your transmission gate is in off condition as pointed to in the diagram, is this what u want?
 

Thank you for replying.
1st question: I am sorry but I dont know what is a high voltage transistor or low voltage transistor. I have never heard of those terms before.

2nd question: I connected bulk to -5V because I want the negative voltage to be able to pass the switch. If I connect the bulk to the ground, then the lowest voltage this switch can pass is -0.7V. Also -Vcc is not -5V, rather it's the voltage that is supposed to turn on or off the switch. I apologize for the confusion.

3rd question: Everytime I simulate it, the transistor breaks down because vgs and vgd of the NMOS transistor has exceeded the oxide breakdown voltage. So I dont even know if this switch is in off condition.

I like to know at what Vcc voltage will turn on this switch and what Vcc voltage will turn off this switch.

Thanks in advance
 
1. different technologies provide the transistors in different operation voltage. eg. H35B4D3 for 0.35um Process can both provide the standard low voltage transistor (3.3V) and also provide the high voltage transistor that can operated in 20V or even 50V.
2. if you use dual supply, it is ok for the connection.
3. for your case, i advice you use high voltage transistor. but you should confirm your current technology is available for high voltage design first.
regardings
 

We need to know the range of voltages you are trying to pass.
If it includes the negative range, are you sure that your process has triple well capabilities to support it?
 

In the nmos transistor, there is a diode between drain and bulk.( p on the bulk and n on the drain) and vice versafor the pmos transistor. You should be always cautious about not to forward bias these diodes. Because it produce a lot of current which can exceed imelt please check that.
 

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